Intern, ASIC Design

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Ayar Labs

51-200 employeesFounded 2015San Jose, CaliforniaComputer Hardware Manufacturing
Actively hiringPaidSummer 2027Computer Hardware Manufacturing
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Best applied by Nov 14

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About the role#

This internship focuses on the development of an AI flow designed to speed up RTL design. You will work on microarchitecture implementation, component integration, and functionality checking. Your work will involve integrating this flow with existing design tools and AI-enabled workflows used at the company.

What you'll do#

  • Develop an AI flow to accelerate RTL design.
  • Implement microarchitecture.
  • Integrate various components.
  • Check design functionality.
  • Connect the new flow with existing design tools and AI workflows.

What you'll need#

  • Active enrollment in a Master’s Degree program for Electrical Engineering.
  • Practical experience in RTL design.
  • Proficiency in Verilog or SystemVerilog.
  • Experience using Python.

Location & details#

  • Location: San Jose, California.
  • Term: Summer 2027 (May to August).
  • Work Modality: On-site.
  • Employment: Full-time internship.
  • Compensation: $50 to $60 per hour, based on education level.
  • Sponsorship: This position does not offer immigration sponsorship.
Relevant fieldsElectrical Engineering

About Ayar Labs

Ayar Labs develops optical I/O technology for AI infrastructure. Founded in 2015 and based in San Jose, California, the company employs between 51 and 200 people. Its hardware solutions aim to improve data movement efficiency for AI training and inference. The company operates as a privately held entity within the computer hardware manufacturing sector.

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